Excavating
Patent
1988-01-19
1990-01-16
Lastova, John R.
Excavating
G01R 3128
Patent
active
048948306
ABSTRACT:
A plurality of first flip-flop circuits are provided having outputs connected respectively to inputs of a logic circuit. During a test mode, scan data is first loaded into the flip-flop circuits to activate desired logical paths in the logic circuit and subsequently a pulse is scanned across the first flip-flop circuits to cause successive reversals to occur in the stored scan data. As a result, test signals can propagate through the activated logical paths. Connected to the outputs of the logic circuit are a plurality of second flip-flop circuits which are configured into a linear feedback shift register during the test mode to enable a test circuit to observe its serial output to determine the dynamic performance of the logic circuit.
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Beausoliel Robert W.
Lastova John R.
NEC Corporation
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