Method of fabricating an insulated gate field effect transistor

Details Method of fabricating an insulated gate field effect transistor Method of fabricating an insulated gate field effect transistor

1991-03-18

1992-09-08

Wilczewdki, Mary

Fishing, trapping, and vermin destroying

437154, 437933, 437152, H01L 21336

Patent

active

051457989

ABSTRACT:
A transistor for VLSI devices employs a phosphorus implant and lateral diffusion performed after the sidewall oxide etch to thereby reduce the impurity concentration and provide a graded junction for the reach-through implanted region between heavily-doped N+ source/drain regions and the channel, beneath the oxide sidewall spacer.

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