System and method for clock management

Details System and method for clock management System and method for clock management

1996-12-31

1999-03-09

Heckler, Thomas M.

395560, G06F 112

Patent

active

058812717

ABSTRACT:
A system in accordance with the invention comprises a first clock input for carrying a clock input signal having first clock cycles, a clock output for carrying an output clock signal having cycles which are synchronous with the first clock cycles, and programmable delay means. Programmable delay means receives the clock input signal, and generates the output clock signal which is delayed from the input by at least a programmable delay and where the programmable delay causes the output clock signal to be synchronous with the input clock signal.

REFERENCES:
patent: 5274796 (1993-12-01), Conner
patent: 5293626 (1994-03-01), Priest et al.
patent: 5455935 (1995-10-01), Taylor et al.
patent: 5572722 (1996-11-01), Vogley
patent: 5625807 (1997-04-01), Lee et al.
patent: 5692165 (1997-11-01), Jeddeloh et al.

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