Boots – shoes – and leggings
Patent
1995-07-26
1996-09-10
Barry, Lance Leonard
Boots, shoes, and leggings
395493, 395800, 364DIG1, 3642328, 3642329, 3642434, G06F 946
Patent
active
055554237
ABSTRACT:
In a high performance multi-mode microprocessor, apparatus and a method for switching between modes while selectively maintaining the contents of selected memory elements inside the microprocessor, including a cache and floating point registers. The microprocessor described herein includes an electrical pin provided externally on the microprocessor chip package, that is connected to a control unit, which is connected to a plurality of registers. Microcode is provided, accessible to the microprocessor, that re-initializes some, but not all, of the microprocessor's registers and caches to their initial state, so that the microprocessor is placed in its initial mode of operation. In operation, the pin is actuated by an electrical signal provided from any of a number of conventional sources, such as an I/O port. Actuation of the pin in turn actuates the control unit, to assert a high priority interrupt. When the interrupt is recognized, the control unit, using the microcode means, selectively re-initializes many of the microprocessor's registers while specifically maintaining the contents of the cache and the floating point registers.
REFERENCES:
patent: 4435068 (1984-03-01), Landa
patent: 4458310 (1984-07-01), Chang
patent: 4628448 (1986-12-01), Murao
patent: 4677548 (1987-06-01), Bradley
patent: 4779187 (1988-10-01), Letwin
patent: 4829472 (1989-05-01), McCourt et al.
patent: 4901283 (1990-02-01), Hanbury et al.
patent: 4958302 (1990-09-01), Fredrickson et al.
patent: 5007027 (1991-04-01), Shimoi
patent: 5088026 (1992-02-01), Bozman et al.
Dave Bursky "80X86-Compatible Family Outperforms Original CPUs," Electronic Design, pp. 53-56, p. 61 (Sep. 26, 1991).
Andrew C. Staugaard, Jr., "How to Program and Interface the 6800, pp. 154-157," 1980.
M. Morris Mano, "Computer System Architecture", pp. 261-263, (2nd ed.), 1982.
Motorola, M C68020 32-Bit Microprocessor User's Manual, pp. 5-41-5-42, 1984.
Zilog, 280 Family Data Book, p. 3, 1989.
Intel Corporation, "Microprocessors", vol. I, p. 2-14, (1991).
Grochowski Edward T.
MacWilliams Peter D.
Barry Lance Leonard
Intel Corporation
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