Data processor with the ability of fast partial clearing of buff

Details Data processor with the ability of fast partial clearing of buff Data processor with the ability of fast partial clearing of buff

1993-09-02

1996-09-10

Harvey, Jack B.

395440, 395445, 395471, G06F 1300

Patent

active

055553940

ABSTRACT:
In a data processor intended for fast partial clearing of a buffer memory which is based on a direct map scheme or a set associative scheme, a latch holds a comparison value used for partial clearing of the buffer memory, a comparator compares a tag read out of a tag array with the comparison value and asserts the clear signal in response to detection of the coincidence of both values, and a control logic circuit produces a hit signal and a new V flag from the old V flag, a coincidence signal, a clear signal and a type signal. In response to the detection of coincidence of values by the comparator, the V flag of a corresponding entry is shifted from the clear waiting state to the invalid state.

REFERENCES:
patent: 3979726 (1976-09-01), Lange et al.
patent: 5179680 (1993-01-01), Colwell et al.
patent: 5197144 (1993-03-01), Edenfield et al.
patent: 5249286 (1993-09-01), Alpert et al.

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