Process for forming bipolar transistor compatible with CMOS util

Details Process for forming bipolar transistor compatible with CMOS util Process for forming bipolar transistor compatible with CMOS util

1999-05-17

2000-03-28

Chaudhuri, Olik

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

Forming base region of specified dopant concentration profile

438372, 438375, 438376, 438377, H01L 21331, H01L 21265

Patent

active

06043130&

ABSTRACT:
A bipolar transistor compatible with CMOS processes utilizes only a single layer of polysilicon while maintaining the low base resistance associated with conventional double-polysilicon bipolar designs. Dopant is implanted to form the intrinsic base through the same dielectric window in which the polysilicon emitter contact component is later created. Following poly deposition within the window and etch to create the polysilicon emitter contact component, large-angle tilt ion implantation is employed to form a link base between the intrinsic base and a subsequently-formed base contact region. Tilted implantation enables the link base region to extend underneath the edges of the polysilicon emitter contact component, creating a low resistance path between the intrinsic base and the extrinsic base. Fabrication of the device is much simplified over a conventional double-poly transistor, particularly if tilted implantation is already employed in the process flow to form an associated structure such as an LDMOS.

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Bulucea, C., "Control of mitter current crowding in bipolar junction transistors using laterally-graded base doping profiles", Int. J. Electronics, vol. 74, pp. 553-566.

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