Method of making a semiconductor memory device having an increas

Fishing – trapping – and vermin destroying

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437 60, 437 80, 437229, 437919, H01L 218242

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055545564

ABSTRACT:
A semiconductor memory device comprises a plurality of memory cell transistors each provided on a substrate in correspondence to a word line and a bit line, and a memory cell capacitor provided in each of the memory cell transistors in electrical connection to a diffusion region formed in the memory cell transistor. The memory cell capacitor comprises a first electrode defined by an upper major surface and a lateral surface that surrounds the first electrode, a dielectric film covering the upper major surface and the lateral surface of the first electrode, and a second electrode covering the dielectric film in correspondence to the upper major surface and the lateral surface of the first electrode, wherein the lateral surface of the first electrode has an undulating form defined by a smooth curve to increase the capacitance of the memory cell capacitor.

REFERENCES:
patent: 5272103 (1993-12-01), Nakamura

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