Method of fabricating electrically eraseable read only memory ce

Details Method of fabricating electrically eraseable read only memory ce Method of fabricating electrically eraseable read only memory ce

1994-09-14

1996-09-10

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 38, 437203, H01L 218247

Patent

active

055545505

ABSTRACT:
A method of fabricating an EPROM cell by forming a trench in a semiconductor substrate, forming a first insulating layer over the surface of the substrate, and the sidewalls and bottom of the trench, forming individual polycrystalline silicon layers on the sidewalls of the trench, implanting a dopant into the substrate in the bottom of, and regions adjacent, the trench, forming a second insulating layer over the polycrystalline silicon layers, forming a control gate over the polycrystalline silicon layers and an electrical contact to the bottom of the trench.

REFERENCES:
patent: 4975383 (1990-12-01), Baglee
patent: 4975384 (1990-12-01), Baglee
patent: 5180680 (1993-01-01), Yang
patent: 5338953 (1994-08-01), Wake
Wolf, "Silicon Processing for the VLSI Era", 1986, pp. 175-178.

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