Fishing – trapping – and vermin destroying
Patent
1995-10-17
1996-09-10
Bowers, Jr., Charles L.
Fishing, trapping, and vermin destroying
437 24, 437913, 148DIG126, H01L 218234
Patent
active
055545467
ABSTRACT:
A high voltage transistor includes a semiconductor-on-insulator (SOI) region in which a source and a channel are formed. A drain drift region is further formed partly in the SOI region and partly in the bulk silicon region beyond SOI and a gate is coupled to said SOI channel.
REFERENCES:
patent: 4523213 (1985-06-01), Konaka et al.
patent: 4866495 (1989-09-01), Kinzer
patent: 5113236 (1992-05-01), Arnold et al.
patent: 5182226 (1993-01-01), Jang
patent: 5346835 (1994-09-01), Malhi et al.
Bowers Jr. Charles L.
Donaldson Richard L.
Kempler William B.
Texas Instruments Inc.
Trinh Michael
LandOfFree
Method of fabricating a high voltage transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating a high voltage transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a high voltage transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1320064