Buried contact configuration for CMOS/SOS integrated circuits

Details Buried contact configuration for CMOS/SOS integrated circuits Buried contact configuration for CMOS/SOS integrated circuits

1978-08-25

1980-04-01

Edlow, Martin H.

357 4, 357 23, 357 65, 357 59, H01L 2348

Patent

active

041964438

ABSTRACT:
A configuration for manufacturing buried contacts in complementary symmetry metal oxide semiconductor (CMOS) manufactured using silicon-on-sapphire (SOS) technology is presented. The buried contact configuration is chosen to provide contact between the epitaxial silicon layer which is grown on the sapphire substrate and the polycrystalline silicon interconnects while insuring that the epitaxial silicon layer will not be removed during the etch which defines the polycrystalline silicon interconnects.

REFERENCES:
patent: 4125854 (1978-11-01), McKenny

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