Process for manufacture of a semiconductor memory device

Details Process for manufacture of a semiconductor memory device Process for manufacture of a semiconductor memory device

1987-12-22

1989-08-01

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 47, 437 60, 437228, 437918, H01L 2710

Patent

active

048533483

ABSTRACT:
A semiconductor memory device such as a MOS dynamic RAM comprises transistor portions (2, 3 and 5) for writing and reading a signal and capacitor portions (1, 2, 6 and 9) by pn junction for storing a signal. The capacitor portions have preferably as large a capacitance as possible. For this purpose, a capacitor hole (7) is formed in a p type semiconductor substrate (6) and an n type semiconductor region (9) is provided along the capacitor hole (7) so that the pn junction area therebetween is increased and the capacitance is made large.

REFERENCES:
patent: 4264382 (1981-04-01), Anomtha et al.
patent: 4407058 (1983-10-01), Fatuda, Jr. et al.
IBM Technical Disclosure Bulletin, vol. 22, No. 3, Aug. 1979, pp. 1000-1001.
IBM Technical Disclosure Bulletin, vol. 25, No. 2, Jul. 1982, pp. 593-596.
IBM Technical Disclosure Bulletin, vol. 26, No. 2, Jul. 1983, pp. 489-490.
"A Corrugated Capacitor Cell (CCC) for Megabit Dynamic MOS Memories", by H. Sunami et al, IEDM 82, 26.9, pp. 806-808.

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