Method of manufacturing semiconductor integrated circuit device

Fishing – trapping – and vermin destroying

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437101, 437228, 437 24, 437 33, 437238, 148DIG10, 148DIG11, 357 34, 357 59H, H01L 21265

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048533424

ABSTRACT:
A transistor is formed according to the solid phase epitaxial growth which is one of the semiconductor integrated circuit device manufacturing techniques. A low-concentration impurity region is formed by selective solid phase epitaxial growth instead of using an epitaxial substrate. The solid phase epitaxial growth is performed twice, when a collector region is formed and when a base region is formed. The depth of collector and base regions are determined by the thickness of the solid phase growth layers, respectively.

REFERENCES:
patent: 4504332 (1985-03-01), Shinada
patent: 4616404 (1986-10-01), Wang
patent: 4651410 (1987-03-01), Feygensan
patent: 4663831 (1987-05-01), Birrittella
patent: 4717681 (1988-01-01), Curran
Yasuo Kunii et al., "Solid-Phase Laterial Epitaxy of Chemical-Vapor Deposited Amorphous Silicon by Furnace Annealing", J. Appl. Phys. 54(5), May 1983, pp. 2847-2849.
Ishiwara et al., "Lateral Solid Phase Epitaxy of Amorphous Si Films on Si Subsrates with SiO.sub.2 Patterns", Appl. Phys. Lett. 43(11), Dec. 1, 1983, pp. 1028-1030.

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