Apparatus for stack control employing mixed hardware registers a

Details Apparatus for stack control employing mixed hardware registers a Apparatus for stack control employing mixed hardware registers a

1988-08-04

1990-11-06

Zache, Raulfe B.

Boots, shoes, and leggings

3642443, 3642451, 364247, 3642477, G06F 1300, G06F 1312

Patent

active

049690914

ABSTRACT:
A mixed hardware register and memory architecture is provided by the present invention to maintain the advantage of variable length stack frames while eliminating the requirement for a stack pointer. The invention includes a global register bank and a stack register bank with two independent address means for addressing the global and stack register banks. Registers are provided as temporary memories for the source operand and destination operand, and a second data path is provided for transfer of data words directly from memory to the local and global registers. The frame pointer is incorporated as a portion of the status register present in the global register bank. Storage of the status register on a call instruction and restore of the status register in a return instruction automatically stores the frame pointer providing the elimination of a hardware register and one cycle in both call and return instructions over prior art devices. The register to register architecture of the invention allows elimination of the stack pointer and stack instructions such as push and pull are unnecessary resulting in a compact instruction set.

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