Patent
1978-05-18
1980-08-26
Wojciechowicz, Edward J.
357 45, 357 41, H01L 2902
Patent
active
042198364
ABSTRACT:
A contact programmable, small cell area MOS read only memory or ROM is formed by a process compatible with standard N-channel silicon gate manufacturing methods. Address lines are metal, gates are second level polysilicon, and output and ground lines are defined by elongated N+ regions. Each potential MOS transistor in the array is programmed to be a logic "1" or "0", by presence or absence of a contact engaging the polysilicon gate over the thin gate oxide.
REFERENCES:
patent: 3914855 (1975-10-01), Cheney et al.
patent: 3985591 (1976-10-01), Arita
Graham John G.
Texas Instruments Incorporated
Wojciechowicz Edward J.
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