VMOS Mesa structure and manufacturing process

Details VMOS Mesa structure and manufacturing process VMOS Mesa structure and manufacturing process

1978-02-17

1980-08-26

Wojciechowicz, Edward J.

357 22, 357 23, 357 53, 357 56, H01L 2906

Patent

active

042198356

ABSTRACT:
A V-groove metal oxide semiconductor field effect transistor (V-MOSFET) including a body of semiconductor material having three plane regions defining two plane rectifying junctions. A V-groove extends into said body through said two junctions from one surface. The plane region at said surface comprises the source, the intermediate plane region, the channel, and the other region, the drain. A gate electrode is formed over an insulating layer in said groove, a source electrode connects to said source and channel regions and a drain electrode is connected to said drain region. A moat surrounds said transistor and penetrates the source and channel regions and a field electrode is disposed over an insulating layer covering the moat wall.

REFERENCES:
patent: 4092660 (1978-05-01), Blocker
patent: 4145703 (1979-03-01), Blanchard et al.

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