Permuted interleaver

Details Permuted interleaver Permuted interleaver

1993-09-13

1996-01-09

Voeltz, Emanuel T.

Excavating

371 43, 371 45, 371 391, G06F 1100

Patent

active

054835410

ABSTRACT:
A permuted interleaver/deinterleaver system for interleaving the bits of a digital communications system such that bursts of error bits are separated for more effective communications. The interleaver/deinterleaver system includes an interleaver and deinterleaver having a number of permuted rows of shift registers. The arrangement of the shift registers in the interleaver and deinterleaver can be determined by a permute number calculated in accordance with a specific communications implementation. As bits are input into the shift register of the interleaver, bits are output from the interleaver in order to establish a sequence of permuted data bits. A rotating switching mechanism systematically selects output bits from the shift register of the interleaver and applies the bits to a channel modulator/demodulator. The deinterleaver accepts the bits from the channel and restores the original bit order.

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