Data processing system capable of performing a direct memory acc

Details Data processing system capable of performing a direct memory acc Data processing system capable of performing a direct memory acc

1989-05-23

1992-10-13

Levy, Stuart S.

Boots, shoes, and leggings

364DIG1, G06F 1206

Patent

active

051558300

ABSTRACT:
A system is constituted by a DMAC, a CPU, a main memory, and an I/O device. The DMAC has a FIFO type BDW buffer for storing a buffer descriptor word (BDW) and a control unit. The control unit loads a BDW from the BDW buffer, and controls DMA. The CPU writes a new BDW in the BDW buffer during a DMA operation execution period.

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Handbook for Electronics, Information and Communication Engineers, vol. 2, 1988, p. 1606 (Japanese and Partial English translations).

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