Instruction format with designations for operand lengths of byte

Details Instruction format with designations for operand lengths of byte Instruction format with designations for operand lengths of byte

1989-02-21

1992-10-13

Lee, Thomas C.

Boots, shoes, and leggings

3649428, 3649462, 3649469, 364DIG2, G06F 930

Patent

active

051558203

ABSTRACT:
A set of processors and instruction set for a pipelined multiprocessing architecture with separate code and data streams is disclosed. The overall architecture considered interlocks instruction execution with the destination transfer of results and includes automated input and output of array data. The data is dispensed from a central memory that is associated with the control unit and all results and inputs are automatically returned to this central memory over a second bus. Once the processors receive their data they operate independently and several instructions may be in the process of being executed at the same time with destination validity checking being used to coordinate the activity. The central memory may contain partitions, called circular partitions, or first-in/first-out buffers which make it possible for it to automatically prefetch or output array data. The instructions include overlapping address and operand length bits.

REFERENCES:
patent: 4037213 (1977-07-01), Atkins et al.
patent: 4109310 (1978-08-01), England et al.
patent: 4135242 (1979-01-01), Ward et al.
patent: 4292667 (1981-09-01), Catiller et al.
patent: 4395758 (1983-07-01), Helenius et al.
patent: 4631667 (1986-12-01), Zulian et al.
patent: 4633434 (1986-12-01), Scheuneman
patent: 4639886 (1987-01-01), Hashimoto et al.
patent: 4654781 (1987-03-01), Schwartz et al.
patent: 4713749 (1987-12-01), Magar et al.
patent: 4722052 (1988-01-01), Scheuneman
patent: 4760525 (1988-07-01), Webb
patent: 4809169 (1989-02-01), Safarti et al.
patent: 4809171 (1989-02-01), Dozier et al.
patent: 4811208 (1989-03-01), Meyers et al.
patent: 4811214 (1989-03-01), Nosenchuck et al.
patent: 4821265 (1989-04-01), Albal et al.
patent: 4873630 (1989-10-01), Rusterholz et al.
patent: 4945479 (1990-07-01), Rusterholz et al.
patent: 4958275 (1990-09-01), Yokouchi
patent: 4979096 (1990-12-01), Ueda et al.
patent: 4987529 (1991-01-01), Craft et al.

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