Junction gate type GaAs field-effect transistor and method of fo

Details Junction gate type GaAs field-effect transistor and method of fo Junction gate type GaAs field-effect transistor and method of fo

1977-05-05

1978-02-21

Wojciechowicz, Edward J.

357 15, 357 16, 357 55, 357 61, 357 63, H01L 2980, H01L 29161, H01L 2906, H01L 29167

Patent

active

040756521

ABSTRACT:
The invention discloses a heterojunction Type GaAs field-effect transistor of the type in which a channel region consists of an n-type GaAs layer with a higher mobility and a gate region consists of a p-type Ga.sub.1-y Al.sub.y As layer which is grown heteroepitaxially. The length of the gate is of the order of microns, and a gate, source and drain electrodes are self-aligned. The gate region is etched in the form of a mushroom with the use of an etchant which etched the GaAlAs layer and the Ga-As layer at different etching rates so that the gate, source and drain electrodes may be formed by only one vacuum deposition of a metal such as aluminum.

REFERENCES:
patent: 3833435 (1974-09-01), Logan et al.
patent: 3906541 (1975-09-01), Goronkin

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