Method of forming isolation region in a compound semiconductor s

Details Method of forming isolation region in a compound semiconductor s Method of forming isolation region in a compound semiconductor s

1994-01-31

1996-01-09

Fourson, George

Fishing, trapping, and vermin destroying

437 24, 437184, 437185, 437 41, H01L 21266

Patent

active

054828724

ABSTRACT:
Compound semiconductor devices (10, 11) having isolation regions (37) under gate pads (24, 27) and a method of forming the compound semiconductor devices (10, 11). A surface protection layer (33) is formed on a compound semiconductor substrate (31). The surface protection layer (33) is patterned to form a plurality of islands (34). A field oxide (28) is formed on the regions of the compound semiconductor substrate (31) adjacent the plurality of islands (34) and surrounds active device regions (12, 13). Isolation regions (37) are formed around active device regions (12, 13). Control electrodes (21, 22) are formed in contact with the active device regions (12, 13) and extend over the field oxide (28). Source/drain regions (16, 17) are formed adjacent the control electrodes (21, 22). Source/drain electrodes (18, 19) are formed in contact with the source/drain regions (16, 17), thereby forming field effect transistors.

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