Fishing – trapping – and vermin destroying
Patent
1994-04-15
1996-01-09
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 29, 437 44, 437 41, 257 66, 257347, H01L 21265
Patent
active
054828716
ABSTRACT:
A method for forming a mesa-isolated SOI transistor using a split-process polysilicon gate including the steps of depositing a layer of buried oxide (14) on a silicon substrate (12), depositing an SOI layer (16) on buried oxide layer (14), and forming a gate oxide layer (18) on the SOI layer (16). Further steps are to form a gate polysilicon mesa (20) on the gate oxide layer, and an SOI mesa (28) on gate polysilicon mesa (20) and forming an oxide sidewall (26) on the gate polysilicon mesa (20) and SOI mesa (28). A gate electrode (38) is the formed along with an oxide sidewall (36). Implanting gate electrode (38) with a boron implant occurs next, after which an oxide sidewall is formed on the gate electrode (38). The gate electrode (38) is implanted with phosphorus to form source and drain region. Thereafter annealing the structure takes place.
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Brady W. James
Chaudhuri Olik
Donaldson Richard L.
Hoel Carlton H.
Pham Long
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