Data processing system with error checking

Details Data processing system with error checking Data processing system with error checking

1979-11-05

1981-12-01

Smith, Jerry

Excavating

364704, 364738, 371 50, G06F 1110, G06F 1516

Patent

active

043040020

ABSTRACT:
A data processing system is disclosed consisting of a plurality of data processing elements and parity processing elements. The parity processing elements hold parity bits for checking the contents of the internal registers and internal stores of the data processing elements and perform substantially the same operations on the parity bits as the data processing elements perform on the data. However, some of these operations may invalidate the parity bits. In particular, the carry result from an addition operation is not always valid. A parity valid logic circuit is therefore provided to generate a signal which indicates whether the parity bits from all the parity processing elements are valid, and hence whether the parity check performed using these parity bits is valid.

REFERENCES:
patent: 3342983 (1967-09-01), Pitkowsky et al.
patent: 3925647 (1975-12-01), Louie

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