Semiconductor device and method for manufacturing the same

Details Semiconductor device and method for manufacturing the same Semiconductor device and method for manufacturing the same

1983-10-26

1986-01-28

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29580, 148175, 148DIG50, H01L 2176

Patent

active

045661740

ABSTRACT:
A method of manufacturing a semiconductor device wherein a pair of grooves having different depths are formed in a surface of a semiconductor substrate, an epitaxial layer of one conductivity type is grown to a depth enough to fill a shallower one of the grooves, and an epitaxial layer of the opposite conductivity type is further grown to a depth enough to fill a deeper one of the grooves, followed by the step of etching the entire surface to expose the surface of said semiconductor substrate and to leave in each groove an epitaxial layer of mutually different conductivity type and having the same depth and width. A semiconductor device as manufactured by the above method.

REFERENCES:
patent: 3397448 (1968-08-01), Tucke
patent: 3456169 (1969-07-01), Klein
patent: 4056413 (1977-11-01), Yoshimura
patent: 4346513 (1982-08-01), Nishizawa et al.
Leuenberger et al., Complementary-MOS Low Power Low Voltage Integrated Binary Counter, IEEE, vol. 57, No. 9, Sep. 1969.
Sakurai, "A New Complementary Dielectric Isolation Process for High Voltage Devices," IEEE Trans. Electron Device, vol. ED-28, No. 10, Oct. 1981.
Beasom, "A Process for Simultaneous Fabrication of Verticle NPN and PNP's, Nch, and Pch MOS Devices," IEDM Technical Digest, Dec. 1976.
Imaizumi et al., "Novel IC Structure for 150V High-Voltage Consumer IC," IEEE Trans. Consumer Electronics, vol. CE-26, pp. 367-375, Aug. 1980.

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