Procedure for shared-time processing of digital signals and appl

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343 5DP, G06F 1531

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active

045077479

ABSTRACT:
A self-adapting digital filter having one or more processing modules each possessing a delayed discrete value memory, a coefficient memory, two multipliers-accumulators, a variable-amplitude shift register and a summing circuit with the delayed discrete value memories being addressed in a manner producing fictive shifting of their contents.

REFERENCES:
patent: 3967102 (1976-06-01), McCown
Jones et al., "A Time-Shared Digital Filter Realization" IEEE Trans. on Computers, vol. C-18, No. 11, Nov. 1969, pp. 1027-1031.

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