Method and apparatus for a continuously variable slope delta ran

Details Method and apparatus for a continuously variable slope delta ran Method and apparatus for a continuously variable slope delta ran

1981-09-29

1983-10-18

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

332 11D, 340347AD, H03K 1322

Patent

active

044110022

ABSTRACT:
To encode an analog to digital signal, a comparator compares an input analog signal with a reconstructed negative feedback analog signal and provides a comparison output digital bit for each comparison. A number of output digital bits is stored in a clocked shift register. A coincidence detector is coupled to the register and provides an output pulse when all the bits in the register are the same. A proportional coincidence integrator proportionally amplifies and integrates the coincidence detector output pulses. A slope polarity switch is coupled to the output of the integrator and to the first bit in the shift register and applies a polarity sign to the integrator output according to the bit value from the register. The output of the switch is integrated to form the reconstructed negative feedback analog signal which is coupled to the comparator for comparison with the input analog signal. The digital output is taken from the shift register first bit. To decode a digital to analog signal, the above circuit is used. The digital signal is applied directly to the input of the shift register, the comparator not being used for decoding. The output analog signal is the integrated output from the polarity switch.

REFERENCES:
patent: 3806806 (1974-04-01), Brolin
patent: 4042921 (1977-08-01), Smith
patent: 4151517 (1979-04-01), Kelley
patent: 4215311 (1980-07-01), Kittel et al.
patent: 4309676 (1982-01-01), Martin et al.

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