Planar doped barrier semiconductor device

Details Planar doped barrier semiconductor device Planar doped barrier semiconductor device

1981-03-23

1983-10-18

Larkins, William D.

357 4, 357 33, 357 58, 357 89, H01L 2906, H01L 2936, H01L 2990

Patent

active

044109024

ABSTRACT:
Disclosed is a majority carrier rectifying barrier semiconductor device housing a planar doped barrier. The device is fabricated in GaAs by an epitaxial growth process which results in an n.sup.+ -i-p.sup.+ -i-n.sup.+ semiconductor structure wherein an extremely narrow p.sup.+ planar doped region is positioned in adjoining regions of nominally undoped (intrinsic) semiconductive material. The narrow widths of the undoped regions and the high densities of the ionized impurities within the space charge region results in rectangular and triangular electric fields and potential barriers, respectively. Independent and continuous control of the barrier height and the asymmetry of the current vs. voltage characteristic is provided through variation of the acceptor charge density and the undoped region widths. Additionally, the capacitance of the device is substantially constant with respect to bias voltage.

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Malik et al., "Planar-Doped Barriers in GaAs . . . ", Electronics Letters, ol. 16, No. 22, Oct. 23, 1980, pp. 836-838.
Malik et al., IEEE Int. Electron Device Meeting, Tech. Digest, (Dec. 7, 1980) pp. 456-459.

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