Process for fabricating III-V semiconducting devices with electr

Details Process for fabricating III-V semiconducting devices with electr Process for fabricating III-V semiconducting devices with electr

1977-11-14

1979-07-24

Smith, John D.

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

106 111, 106 123, 106 126, 204 38B, 204 32S, 427 87, 427125, 427304, 427309, 427299, 156643, C23C 302

Patent

active

041623371

ABSTRACT:
A process is described for making III-V semiconductor devices with electroless gold plated layers. Various III-V semiconductors are used, particularly those containing gallium, aluminum and indium such as GaAs, Al.sub.x Ga.sub.1-x As, GaP, Al.sub.x Ga.sub.1-x P.sub.y As.sub.1-y, In.sub.x Ga.sub.1-x P.sub.y As.sub.1-y and InP. This process involves activation of a semiconductor surface and then electrolessly gold plating the surface. Electroless gold films produced in accordance with this process have good adherence to the semiconductor surface and are useful not only for electrical connection to the semiconductor, but also for attachment to headers for mechanical convenience and to maintain temperature stability. Exemplary devices are field effect transistors, particularly those operating in the microwave region, and semiconductor lasers.

REFERENCES:
patent: 2995473 (1961-08-01), Levi
patent: 3214292 (1965-10-01), Edson
patent: 3349476 (1967-10-01), Pilkuhn et al.
patent: 3428474 (1969-02-01), Hensler et al.
patent: 3485665 (1969-12-01), DeAngelo et al.
patent: 3700469 (1972-10-01), Okinaka
patent: 3808028 (1974-04-01), Lando
patent: 3917885 (1975-11-01), Baker
Logan et al., Journal of the Electrochemical Society, vol. 120, pp. 1385-1390, Oct. 1973.
Evmanis et al., Journal of the Electrochemical Society, vol. 121, pp. 1665-1667, Dec. 1974.
Ikving, Solid State Technology, Jun. 1971.

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