High-speed, low-power-dissipation integrated circuits

Details High-speed, low-power-dissipation integrated circuits High-speed, low-power-dissipation integrated circuits

1986-07-07

1988-02-09

Ozaki, George T.

Fishing, trapping, and vermin destroying

437 32, 437 54, 437 74, H01L 2138, H01L 21425

Patent

active

047242213

ABSTRACT:
A method of manufacturing a semiconductor device having an integrated circuit in an epitaxial layer on a substrate in which the epitaxial layer comprises islands of conductivity type opposite to that of the substrate which are surrounded laterally by a surrounding region of the same conductivity type as the substrate, is disclosed. Both the islands and the surrounding region are formed by diffusion from buried layers through the epitaxial layer. A bipolar transistor is provided in at least one island. The p-n junctions between the islands and the surrounding region are substantially at right angles to the surface. The invention involves a method of manufacturing the device and is of particular importance for realizing very compact and fast circuits with low dissipation consisting of a combination of CMOS bipolar subcircuits.

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