Highly responsive barrel shifter

Boots – shoes – and leggings

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364900, G06F 700

Patent

active

048398403

ABSTRACT:
In a barrel shifter for shifting an input data by a given shift count in response to shift signals through series-connected NMOS transistors, it is impossible to obtain a sufficiently high ("1") or low ("0") level output signal at high response speed because of the presence of a threshold voltage of the NMOS transistor. To overcome this problem, the drain of the rearmost NMOS transistor (the output terminal of the shifter) is precharged to a supply voltage V.sub.DD in response to a precharge signal before an input data is shifted. Thereafter, if the input data changes to a "1" level, the rearmost NMOS transistor is turned off to output the precharged voltage V.sub.DD as the "1" level shifted output data. On the other hand, if the input data is at a "0" level, the rearmost NMOS transistor is turned on to output a ground voltage GND as the "0" level shifted output data.

REFERENCES:
patent: 3961750 (1976-06-01), Dao
patent: 4345316 (1982-08-01), Hirotani et al.
patent: 4383304 (1983-05-01), Hirashima
patent: 4396944 (1983-08-01), Kang et al.
patent: 4472788 (1984-09-01), Yamazaki
patent: 4509144 (1985-04-01), Palmer et al.
patent: 4583197 (1986-04-01), Chappell et al.
patent: 4665538 (1987-05-01), Machida
patent: 4700324 (1987-10-01), Doi et al.

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