Boots – shoes – and leggings
Patent
1985-07-25
1989-06-13
Shaw, Gareth D.
Boots, shoes, and leggings
3642446, 3642476, 3642599, 36426281, G06F 100
Patent
active
048397970
ABSTRACT:
A microprocessor includes a central processing unit which executes a program according to at least one control signal generated by an instruction decoder. The instruction decoder is designed such that a first type instruction compatible for the central processing unit can be decoded. A second type instruction not compatible for the central processing unit is applied as an address to a conversion memory in which a first type instruction corresponding in function to the second type instruction has been stored. The first type instruction in the conversion memory is then applied to the instruction decoder instead of the second type instruction. Thus, the second type instruction can be executed by the central processing unit which is not otherwise compatible with the second type instruction.
REFERENCES:
patent: 4315321 (1982-02-01), Parks, III et al.
patent: 4388682 (1983-06-01), Eldridge
patent: 4415969 (1983-11-01), Bayliss et al.
patent: 4638423 (1987-01-01), Ballard
Katori Shigetatsu
Maehashi Yukio
NEC Corporation
Rudolph Rebecca L.
Shaw Gareth D.
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