High speed write control for synchronous registers

Details High speed write control for synchronous registers High speed write control for synchronous registers

1981-08-27

1983-10-11

Hecker, Stuart N.

Static information storage and retrieval

Addressing

Sync/clocking

365 78, 365190, 377 67, 377 79, G11C 800, G11C 700

Patent

active

044096801

ABSTRACT:
An electronic circuit for regulating the entry of new data into a static synchronous register comprising a bank of D type, master-slave flip-flops. The circuit selectively passes the first phase of a two-phase, nonoverlapping clock signal used for synchronization and control of the data. A bootstrap operated, series pass, transistor configuration couples the first phase signal to the electrode actuating the master stage of each flip-flop. With provisions for the series pass transistor to transition into a conductive state prior to the onset of the first phase signal, the circuit ensures substantial replication of the first phase signal characteristics in terms of both time and amplitude.

REFERENCES:
patent: 3504353 (1970-03-01), Guzak
patent: 4070630 (1978-01-01), Hepworth et al.
patent: 4090256 (1978-05-01), Hepworth et al.
patent: 4338679 (1982-07-01), O'Toole

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