Normally-on enhancement mode MOSFET with negative threshold gati

Details Normally-on enhancement mode MOSFET with negative threshold gati Normally-on enhancement mode MOSFET with negative threshold gati

1980-07-25

1983-10-11

Davie, James W.

357 41, 357 58, H01L 2702, H01L 2912, H01L 2978

Patent

active

044096070

ABSTRACT:
A VLSI enhancement mode metal oxide semiconductor field effect transistor operative to be Normally-On except during those periods when a negative threshold voltage is applied to the gate electrode. A submicron MOSFET channel having relatively high resistivity substrate allows for source and drain PN junction with overlapping depletion regions to create an electric field that promotes a surface inversion layer in the channel for conduction between the source and drain in a Normally-On mode except upon application of a negative gate threshold that acts to invert the channel surface to a non-conducting mode.

REFERENCES:
patent: 3996655 (1976-12-01), Cunningham et al.
patent: 4081817 (1978-03-01), Hara
patent: 4242691 (1980-12-01), Kotani et al.

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