High voltage precharging circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307296R, 307304, H03K 1756, H03K 301

Patent

active

047031964

ABSTRACT:
A precharging circuit employing ordinary enhancement (E) types MIST'S produces erasing and writing (E-W) voltages to change the data stored in an EEPROM fabricated in a common memory chip with the circuit. The E-W voltage increases gradually from a low level to a high level over a long time interval determined substantially by a long time constant RC circuit, the voltage charge developed on the capacitor C comprising the E-W voltage. The resistor R is implemented by a first MIST connected between a high voltage source and the capacitor C, the gate thereof being controlled by a charge-pump (CP) circuit and a second MIST. The CP circuit is connected between the capacitor C and the gate of the first MIST and is rendered operative during successive clock pulses of a series of clock pulses applied thereto. The CP circuit, during each clock interval, produces a voltage output applied to the first MIST which exceeds the threshold voltage V.sub.th thereof, whereby the first MIST periodically is turned ON for conducting a charging current which flows into the capacitor C. The second MIST is connected between the gate of the first MIST and the capacitor C for suppressing the gate voltage of the first MIST thereby limiting the interval during which the charging current flows therethrough, to a limited portion of each clock pulse interval. The intermittent charging current establishes a long time interval for charging the capacitor C to a value substantially equal to the high voltage source.

REFERENCES:
patent: 4390798 (1983-06-01), Kurafuji
patent: 4439692 (1984-03-01), Beekmans et al.
patent: 4463273 (1984-07-01), Dingwall
patent: 4503345 (1985-03-01), Yamamura

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