Method for the analysis and synthesis of binary signals

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328 22, 328164, 375 4, H04L 120, H04L 2504, G06F 1520

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active

049439260

ABSTRACT:
Method for analyzing and synthesizing pulses using a first pulse state memory for storing the pulse state connected to a pulse edge detector for detecting a pulse change of state, the latter connected to the reset pin of a pulse counter driven by a clock; a first-in-first-out memory connected to the counter for receiving the counter content for each pulse, and a microprocessor connected to the first-in-first-out memory output, having a signal pulse list for storing for each pulse its state and pulse length measured in clock counts. Two or more associate memories are provided for storing clock count of any 0-state pulse and any 1-state pulse, and a pulse display connected to each associate memory to display any 0-state pulse and any 1-state pulse as a percentage of the total pulse period To.

REFERENCES:
patent: 4227251 (1980-10-01), Kazama et al.
patent: 4327356 (1982-04-01), Gilliland
patent: 4546394 (1985-10-01), Yamamoto

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