Transistor isolation

Details Transistor isolation Transistor isolation

1988-05-31

1990-07-24

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 33, 437 37, 437 59, 437 63, 437 70, 437941, 437953, H01L 21265, H01L 2176

Patent

active

049435361

ABSTRACT:
A BICMOS semiconductor device (20) and method for its fabrication is disclosed. Bipolar, PMOS, and NMOS transistors (22, 26, and 28) are isolated from one another by a P type channel stop (54) implantation step prior to formation of a field oxide (56). An N type channel stop (64) implantation step occurs after the field oxide (56) formation. In addition, the N type channel stop (64) implantation step utilizes the same mask as is used to implant N dopant which forms a deep collector region (62) for the bipolar transistor (22).

REFERENCES:
patent: 4494304 (1985-01-01), Yoshioka
patent: 4536945 (1985-08-01), Gray et al.
patent: 4546534 (1985-10-01), Nicholas
patent: 4637125 (1987-01-01), Iwasaki et al.
patent: 4721686 (1988-01-01), Contiero et al.
patent: 4818720 (1989-04-01), Iwasaki
patent: 4825275 (1989-04-01), Tomassetti
patent: 4826780 (1989-05-01), Takemoto et al.

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