Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Patent
1999-04-08
2000-11-21
Mai, Tan V.
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
708620, G06F 738, G06F 752
Patent
active
061516163
ABSTRACT:
Disclosed is a method and circuit for detecting overflow when multiplying operands. The disclosed method and circuit is configured to operate in parallel with a multiplier configured to multiply first and second n bit operands. In general, the multiplier circuit generates result operand which represents a multiplication of the first and second n bit operands. An overflow detection circuit is coupled to the multiplier circuit and configured to generate an overflow signal which indicates that the multiplication of the first and second n bit operands results in an overflow condition. The multiplier circuit comprises a compression circuit configured to generate the first and second 2n bit partial product operands as a function of the first and second n bit operands. An addition of the first and second 2n bit partial product operands produces the result operand. The multiplier circuit also includes a carry generation circuit configured to generate at least one carry bit representing a carry value of adding the (n-1) least significant bits of the first and second 2n bit partial product operands. The carry bit along with the most significant (n+1) bits of the first and second 2n bit partial product operands are provided to the overflow detection circuit. In response, the overflow detection circuit is configured to generate the overflow signal as a function of the carry bit and the most significant (n+1) bits of the first and second 2n bit partial product operands.
REFERENCES:
patent: 5122981 (1992-06-01), Taniguchi
patent: 5138570 (1992-08-01), Argade
patent: 5390134 (1995-02-01), Heikes et al.
patent: 5539685 (1996-07-01), Otazuro
patent: 5671171 (1997-09-01), Yu et al.
patent: 5745397 (1998-04-01), Nadehara
Advanced Micro Devices , Inc.
Daffer Kevin L.
Mai Tan V.
LandOfFree
Method and circuit for detecting overflow in operand multiplicat does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and circuit for detecting overflow in operand multiplicat, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit for detecting overflow in operand multiplicat will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1266772