Method of making dynamic random access semiconductor memory devi

Details Method of making dynamic random access semiconductor memory devi Method of making dynamic random access semiconductor memory devi

1993-06-18

1994-09-27

Thomas, Tom

Fishing, trapping, and vermin destroying

437 47, 437 48, 437 60, H01L 2170

Patent

active

053507088

ABSTRACT:
A groove, which runs vertically and horizontally, is formed in a substrate, thereby a plurality of silicon pillars are formed in a matrix manner. A field oxidation film is formed on the central portion of the groove. A drain diffusion layer is formed on the upper portion of each silicon pillar, and a source diffusion layer is formed on the bottom portion of the groove. A gate electrode, serving as a word line, a storage node contacting the source diffusion layer, and a cell plate are sequentially buried to enclose the surroundings of each silicon pillar, and a bit line is formed in an uppermost layer, thereby a DRAM cell array is structured.

REFERENCES:
patent: 4445539 (1989-07-01), Inoue
patent: 5192704 (1993-03-01), McDavid et al.
IBM TDB, vol. 32, No. 10B, Mar. 1990, pp. 179-181, High Density Tantalum Oxide Capacitor DRAM Cell Structure and Process Outline for G4MB DRAM Chips and Beyond.

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