Apparatus and method for generating configuration and test files

Details Apparatus and method for generating configuration and test files Apparatus and method for generating configuration and test files

1997-05-27

2000-08-29

Lintz, Paul R.

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

716 18, 716 19, 717 1, G06F 1750

Patent

active

061120200

ABSTRACT:
An apparatus and method for generating configuration and test files for programmable logic devices includes a dynamic configuration and test generation program to specify, in source code, a logic function to be implemented by a programmable logic device. A device test development kernel program has information characterizing physical elements of the programmable logic device and bit patterns for implementing connections between the physical elements of the programmable logic device. The device test development kernel program converts the logic function into a configuration file for use in programming the logic function into the programmable logic device. The dynamic configuration and test generation program also specifies, in source code, a test operation to be executed by the programmable logic device. It operates with the device test development kernel program to produce a vector file for use in testing the programmable logic device.

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