Boots – shoes – and leggings
Patent
1990-06-21
1994-06-14
Coleman, Eric
Boots, shoes, and leggings
3642597, 364260, 3642628, 3649427, 364DIG1, G06F 1200
Patent
active
053218230
ABSTRACT:
A high-performance, pipelined CPU in which an improved method is used for saving registers in memory upon the occurrence of a procedure CALL or RETURN. The registers which need to be saved are defined by a bit-mask, and the number of bits is counted by a hardwired circuit, in each machine cycle, producing an output in the form of an offset from a stack pointer which represents the highest memory location needed to save the registers being used. Then a memory probe can be done to see if this location is writable. Thus, in one microinstruction cycle, the count is made and the memory probe can begin.
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Calcagni Richard E.
Grundmann William J.
Uhler George M.
Coleman Eric
Digital Equipment Corporation
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