Static information storage and retrieval – Addressing
Patent
1999-03-17
2000-08-29
Fears, Terrell W.
Static information storage and retrieval
Addressing
36518901, 36523003, G11C 700
Patent
active
061118079
ABSTRACT:
A synchronous semiconductor memory device performs input/output of data in synchronization with an externally applied external clock signal or a data strobe signal in a test operation mode. An operation of an internal circuit in the test operation mode is performed in synchronization with a clock signal produced by an internal control clock producing circuit and being faster than the external clock. In the test operation mode, a decode circuit produces write data based on data applied to a specific terminal among data I/O terminals, and a result of comparison of a plurality of read data is issued to the specific terminal during a data read operation.
REFERENCES:
patent: 5487050 (1996-01-01), Kim
"A 2.5-ns Clock Access, 250-MHz, 256-Mb SDRAM with Synchronous Mirror Delay", by Saeki et al., IEEE Journal of Solid-State Circuits, vol. 31, No. 11, Nov. 1996, pp. 1656-1665.
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
LandOfFree
Synchronous semiconductor memory device allowing easy and fast t does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Synchronous semiconductor memory device allowing easy and fast t, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronous semiconductor memory device allowing easy and fast t will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1255747