Universal asynchronous receiver/transmitter (UART) slave device

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Details

395306, 395309, G06F 1300

Patent

active

058623540

ABSTRACT:
A processor system is disclosed wherein said processor system is adapted to communicate over at least one one-wire network utilizing one-wire communications protocol. For the embodiment of the invention in which the processor system acts as a network master, the processor system includes a master UART especially configured to control communications over such network according to one-wire protocol. For the embodiment of the invention in which the processor communicates over two one-wire networks, the processor system includes a first UART which acts as a slave and a second UART which acts as a master.

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