Dual-scale topology optoelectronic matrix algebraic processing s

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364822, 364713, 395 25, G06E 300

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active

053216393

ABSTRACT:
A parallel architecture matrix algebraic processing system exhibits patterns of arrayed (i) light transmitters and (ii) light receivers that are identical, but at differing scales. Planar arrays of one or more optoelectronic processors--principally semiconductor chips or chip arrays--having both computational and light input/output capabilities optically communicate from one plane to the next through free-space space-invariant optical data distributions--principally lenses and computer-generated holograms--having both replication and distribution capabilities. Each optoelectronic processor, or OP, consists of a number of arrayed optoelectronic processing elements, or OPEs. The OPEs, in turn, typically consist of a number of optoelectronic sub-processing units are preferably electrically interconnected in a tree-based structure, preferably an H-tree. Leaf units include typically one light detector plus local memory, logic circuitry, and electrical input/output. Fanning units typically include local memory, logic circuitry, and electrical input/output. A root unit typically includes electrically-connected local memory, logic circuitry, electrical input/output, and a light transmitter. Vector results of algebraic computations and combinations are flexibly performable in the units of each OPE, and variously optically distributable to other OPEs in successive OPs. The versatile algebraic vector manipulations and vector distributions support primitive functions such as intrinsic and extrinsic vector outer products; operations such as vector-matrix multiplication; and complex systems such as neural networks, fuzzy logic and relational databases. A system of .gtoreq.10.sup.3 fully optically communicating OPEs achieves capacities of 10.sup.6 -10.sup.8 interconnects, and processing speeds of 10.sup.12 interconnects/second.

REFERENCES:
patent: 4705344 (1987-11-01), Hinton et al.
patent: 4908751 (1990-03-01), Smith
patent: 4972363 (1990-11-01), Nguyen et al.
patent: 4996648 (1991-02-01), Jourjine
patent: 5014096 (1991-05-01), Matsuda et al.
patent: 5129041 (1992-07-01), Pernick et al.

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