Static information storage and retrieval – Floating gate – Particular biasing
Patent
1991-04-18
1992-08-18
Popek, Joseph A.
Static information storage and retrieval
Floating gate
Particular biasing
365149, 357 235, G11C 1140
Patent
active
051405520
ABSTRACT:
A semiconductor memory device comprising a DRAM, an EEPROM, a mode switch circuit for selecting either mode of the DRAM mode and the EEPROM mode, and a transfer circuit for transferring data stored in the DRAM to the EEPROM and vice versa. The DRAM consists of one transistor and one capacitor, and one of the terminals of the capacitor is electrically isolated. The EEPROM consists of a floating gate and a control gate, and the mode switch circuit consists of a MOS transistor having a control gate integrally formed with the control gate of the EEPROM.
REFERENCES:
patent: 3911464 (1975-10-01), Chang et al.
patent: 4271487 (1981-06-01), Craycraft et al.
patent: 4354255 (1982-10-01), Stewart
patent: 4672580 (1987-06-01), Yau et al.
patent: 4721987 (1988-01-01), Baglee et al.
patent: 4725983 (1988-02-01), Terada
patent: 4760556 (1988-07-01), Deguchi et al.
patent: 4786954 (1988-11-01), Morie et al.
patent: 4813018 (1989-03-01), Kobayashi
patent: 5075888 (1991-12-01), Yamauchi et al.
Terada et al., IEEE Journal of Solid-State Circuits (1988) 23 (1): 86-90.
Sakiyama Keizo
Tanaka Ken'ichi
Yamauchi Yoshimitsu
Lane Jack A.
Popek Joseph A.
Sharp Kabushiki Kaisha
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