Interface system for bus line control

Details Interface system for bus line control Interface system for bus line control

1980-05-29

1984-06-12

Gruber, Felix D.

Boots, shoes, and leggings

G06F 1300, G06F 300

Patent

active

044545916

ABSTRACT:
An external I/O pull down latch and a system embodiment thereof. The interface system has a bus line including of a first means for providing an output at a fixed voltage level on said bus line for a first time interval, and a second means coupled to said bus line for maintaining the bus line at the fixed voltage level subsequent to the first time interval. In the preferred embodiment, the second means is comprised of said external I/O pull down latch. The present invention is a replacement for traditional pull up or pull down resistors in controlling I/O bus lines coupling main processor circuits with external memory circuits. In the preferred embodiment, the external I/O pull down latch is comprised of a read-write memory bit cell, sized such that it may be overdriven by any driver attached to the bus line.

REFERENCES:
M 6800 Microprocessor Application Manual, Motorola Semiconductor Products Inc., First Edition, Second Printing, 1975.

Affiliated with

Also associated with

Rating

Interface system for bus line control does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Interface system for bus line control, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Interface system for bus line control will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-125391