Boots – shoes – and leggings
Patent
1987-08-18
1991-07-02
Harkcom, Gary V.
Boots, shoes, and leggings
340703, 340750, 364521, 364200, G06F 1520
Patent
active
050291050
ABSTRACT:
A graphics system uses a programmable tile size and shape supported by a frame buffer memory organization wherein (X, Y) pixel map into regularly offset permutations on groups of RAM (Random Access Memory) address and data line assignments. Changing the mapping of (X, Y) pixel addressed to RAM addresses for the groups changes the size and shape of the tiles. A pixel data/partial address multiplexing method based on programmable tile size reduces the number of interconnections between a pixel interpolator and the frame buffer without significantly increasing the number of bus cycles needed to transfer the information. A programmable pipelined shifter allows the dynamic alteration of the mapping between bits of the RGB (red, green, blue) intensity values and the planes of the frame buffer into which those bits are stored, as well as allowing those values to be truncated to specified lengths. Tiles are cached. Tiles for RGB pixel values are cached in an RGB cache, while Z values are cached in a separate cache.
REFERENCES:
patent: 4407016 (1983-09-01), Bayliss et al.
patent: 4467414 (1984-08-01), Akagi et al.
patent: 4574394 (1986-03-01), Holsztynski
patent: 4597044 (1986-06-01), Circello
Cherry Robert W.
Coleman Mark D.
Harkcom Gary V.
Herndon H. R.
Hewlett-Packard
Miller Edward L.
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