Semiconductor package for surface mounting

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

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257666, 257672, 257723, H01L 2941

Patent

active

058616691

ABSTRACT:
A semiconductor device having a package of a single in-line type includes a semiconductor chip, a package body that accommodates the semiconductor chip therein and defined by a pair of opposing major surfaces and a plurality of interconnection leads held by the package body to extend substantially perpendicularly to a bottom surface. Each of the interconnection leads consists of an inner lead part located inside the package body and an outer lead part located outside the package body, the outer lead part being bent laterally at a boundary between the inner part and the outer part, in one of first and second directions that are opposite from each other and substantially perpendicular to the opposing major surfaces of the package body. A plurality of support legs extend laterally at the bottom surface of the package body for supporting the package body upright when the semiconductor device is placed on a substrate.

REFERENCES:
patent: 4441119 (1984-04-01), Link
patent: 4967262 (1990-10-01), Farnsworth
patent: 4975763 (1990-12-01), Baudouin et al.
patent: 5147815 (1992-09-01), Casto
patent: 5245215 (1993-09-01), Sawaya
Patent Abstracts of Japan, vol. 11, No. 359 (E-559), Nov. 12, 1987 & JP-A-62 136 060 (Mitsubishi Electric Corp.), Jun. 19, 1987.
Patent Abstracts of Japan, vol. 12, No. 435 (E-683), Nov. 16, 1988 & JP-A-63 169 055 (NEC Corp.), Jul. 13, 1988.
Patent Abstracts of Japan, vol. 14, No. 324 (E-951), Jul. 11, 1990 & JP-A-02 109 357 (Sumitomo Special Metals Co.), Apr. 23, 1990.

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