Method of fabricating a thin-film transistor and wiring matrix d

Details Method of fabricating a thin-film transistor and wiring matrix d Method of fabricating a thin-film transistor and wiring matrix d

1993-01-08

1994-06-14

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 41, 437101, 437181, H01L 21336

Patent

active

053209737

ABSTRACT:
A method for easily fabricating a thin-film transistor device which has a high reliability. A thin-film transistor is formed on a substrate, the transistor including a first conducting layer deposited on the substrate, a gate insulating layer formed on the first conducting layer, a semiconductor layer deposited on the gate insulating layer, and source and drain electrodes on the semiconductor layer. A multi-layer wiring section is provided adjacent the thin-film transistor, including a first conducting wiring layer formed on the substrate, wiring insulating layer formed on the first conducting wiring layer, and a second conducting wiring layer deposited on the wiring insulating layer and contacting the first conducting wiring layer as well as a portion of the thin-film transistor. The gate insulating layer and the wiring insulating layer are made of the same inorganic material and are of the same thickness.

REFERENCES:
patent: 4115799 (1978-09-01), Luo
patent: 4119992 (1978-10-01), Ipri et al.
patent: 4545112 (1985-10-01), Holmberg et al.
patent: 4618878 (1986-10-01), Aoyama et al.
patent: 4624737 (1986-11-01), Shimbo
patent: 4646424 (1987-03-01), Parks et al.
patent: 4704559 (1987-11-01), Suginoya et al.
patent: 4704783 (1987-11-01), Possin et al.
patent: 4705358 (1987-11-01), Yamazaki et al.
patent: 4738749 (1988-04-01), Maurice et al.
patent: 4752814 (1988-06-01), Tuan
patent: 4759610 (1988-07-01), Yanagisawa
patent: 4778560 (1988-10-01), Takeda et al.
patent: 4790630 (1988-12-01), Maurice
patent: 4820024 (1989-04-01), Nishiura
patent: 4918494 (1990-04-01), Koden et al.
patent: 4928161 (1990-05-01), Kobayashi
patent: 4931661 (1990-06-01), Fukaya et al.
patent: 4933296 (1990-06-01), Parks et al.
patent: 5032531 (1991-07-01), Tsutsui et al.
patent: 5032536 (1991-07-01), Oritsuki et al.
patent: 5068699 (1991-11-01), Chang
Snell et al., "Application of Amorphous Silicon Field Effect Transistors in Addressable Liquid Crystal Display Panels", Appl. Phys. vol. 24, 1981, pp. 357-362.

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