Low resistance silicided substrate contact

Details Low resistance silicided substrate contact Low resistance silicided substrate contact

1990-04-02

1992-08-18

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437160, 437 31, 437 40, H01L 21225

Patent

active

051399660

ABSTRACT:
Low resistance contacts for establishing an electrical pathway to an integrated surface substrate are provided. The pathway is formed by the connection of a p+ doped channel stop region with a p+ doped extrinsic layer. P+ doped polysilicon contacts are positioned on the substrate surface. In one embodiment, a metal silicide layer connects the polysilicon contacts and overlies the p+ doped extrinsic layer.

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