Semiconductor device

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357 2311, H01L 2702, H01L 2978

Patent

active

045491984

ABSTRACT:
A semiconductor device comprises a semiconductor substrate of N conductivity, a semiconductor well of P conductivity type, a first semiconductor region of P conductivity type formed in the substrate, the first semiconductor region forming a source region or a drain region in a first MOS transistor of P channel type, a second semiconductor region of N conductivity type formed in the well, the second semiconductor region forming a source region or a drain region in a second MOS transistor of N channel type, and a third semiconductor region of P conductivity type for partially covering the peripheral and bottom surfaces of said second region, which are in the proximity of a boundary defined between the substrate and the well, the third semiconductor region having an impurity concentration higher than that of the well.

REFERENCES:
patent: 3751722 (1973-08-01), Richman
patent: 4013484 (1977-03-01), Boleky et al.
patent: 4027380 (1977-06-01), Deal et al.
patent: 4045250 (1977-08-01), Dingwall
patent: 4135955 (1979-01-01), Gasner et al.
patent: 4306916 (1981-12-01), Wollesen et al.
Baptiste et al., "High-Density Hermetically Sealed COS/MOS LSI Arrays" 8081 Proceedings of the Net. Electr. Conf., (1975), vol. 30, pp. 342-347.

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