Method of making retarded DDD (double diffused drain) device str

Details Method of making retarded DDD (double diffused drain) device str Method of making retarded DDD (double diffused drain) device str

1995-08-07

1996-10-15

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 44, 437149, 437151, 437152, H01L 218234

Patent

active

055653693

ABSTRACT:
A method of forming a retarded double diffused drain structure, and the resultant retarded double diffused drain structure, for a field effect transistor are described. A silicon substrate with field isolation regions and a gate structure is provided. A layer of photoresist is formed on the field isolation region, the silicon substrate, and the gate structure. The photoresist is patterned to expose the silicon substrate and the gate structure, but covers an area of the silicon substrate that is offset from the field isolation regions. A first ion implant is performed in a vertical direction in exposed regions of the silicon substrate, with suitable dopant having a high doping concentration. The photoresist is removed. A second ion implant is performed in a vertical direction in the silicon substrate, with suitable dopant with higher doping concentration than the first ion implant, in regions between the field isolation regions and the gate structure. The substrate is heated to drive in both the dopants.

REFERENCES:
patent: 4305201 (1981-12-01), Tielert
patent: 4342149 (1982-08-01), Jacobs et al.
patent: 4577391 (1986-03-01), Hsia et al.
patent: 4851360 (1989-07-01), Haken et al.
patent: 5210044 (1993-05-01), Yoshikawa
patent: 5225357 (1993-07-01), Ho
"VLSI Technology", by S. M. Sze, published by McGraw-Hill International-Singapore, 1988, pp. 482-483.

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